1. Field of the Invention
The present specification discloses a semiconductor device and a manufacturing method for the semiconductor device.
2. Description of Related Art
For example, Japanese Patent Application Publication No. 2012-235081 (JP 2012-235081 A) and Japanese Patent Application Publication No. 2013-016623 (JP 2013-016623 A) disclose a semiconductor device, in which a first conductive member electrically connected to a first electrode of a first semiconductor element, and a second conductive member electrically connected to a second electrode of a second semiconductor element, are bonded to each other through a bonding layer. A tin-based solder material or the like is used for bonding.
The first conductive member includes a first stack part that is stacked to the first semiconductor element on the first electrode side, and a first joint part extending from the first stack part. The second conductive member includes a second stack part that is stacked to the second semiconductor element on the second electrode side, and a second joint part extending from the second stack part. The first electrode and the first stack part are bonded to each other by a first bonding layer, and the second electrode and the second stack part are bonded to each other by a second bonding layer. The first joint part and the second joint part are bonded to each other by an intermediate bonding layer.
When current flows through bonded surfaces made from different metals, a phenomenon occurs in which metal atoms move from one of the metals to the other metal and voids are generated in one of the metals. For example, when current flows through a boundary surface between copper and a bonding layer, there are instances where metal moves from the bonding layer to the copper, and voids are made in the bonding layer. This phenomenon is called an electromigration phenomenon. Herein below, for convenience of explanation, the electromigration phenomenon is referred to as an EM phenomenon for short. Japanese Patent Application Publication No. 2013-175578 (JP 2013-175578 A) discloses a technology for restraining the EM phenomenon in a flip chip such as CPU. In JP 2013-175578 A, a nickel layer is formed on an electrode pad, and a solder material (solder bump) is mounted on the nickel layer to bond the flip chip electrode to the electrode pad. The nickel layer restrains metal atoms from moving between a solder layer, which is the melted and solidified solder material, and a base material of the electrode pad.
With demands for compact semiconductor devices, a first joint part and a second joint part are also downsized. In FIG. 22 and FIG. 23 of JP 2013-016623 A, a semiconductor device is disclosed, in which a joint part (referred to as a “conductive part 90” in JP 2013-016623 A) is smaller than a stack part (referred to as a “heat sink” in JP 2013-016623 A). When, an area of the intermediate bonding layer, by which the first joint part and the second joint part are bonded to each other, is smaller than an area of the first bonding layer, by which the first electrode and the first stack part are bonded to each other, it is more likely that the EM phenomenon occurs in the intermediate bonding layer. Similarly, when the area of the intermediate bonding layer, by which the first joint part and the second joint part are bonded to each other, is smaller than an area of the second bonding layer, by which the second electrode and the second stack part are bonded to each other, it is more likely that the EM phenomenon occurs in the intermediate bonding layer.